Welcome
The RISC-V Summit Europe is the premier event that connects the European movers and shakers – from industry, government, research, academia and ecosystem support – that are building the future of innovation on RISC-V.
RISC-V, the open standard instruction set architecture (ISA), is enabling a range of new applications and research that will define the future of computing in Europe. The region has been central to RISC-V’s success, with one-third of RISC-V’s global community based in Europe.
RISC-V Summit Europe takes place in Bologna from Monday 8th to Thursday 11th June, 2026, with side events on Friday 12th. The combination of strong industrial and academic communities is key to the success of RISC-V in Europe, and for this reason the conference is designed to help attendees to explore both commercial and research applications. RISC-V Summit Europe is an opportunity not to be missed. Come to Bologna to be part of the new wave of European computing innovation!
Summit Overview
Get up to speed on Monday, and start a full week of RISC-V news!
Schedule subject to minor adjustments. Updates to follow here.
Keynotes & Invited Talks
Learn about the exciting progress of RISC-V across industries and the hardware/software stack from our keynote speakers and invited talks
Check for upcoming updates!
Krste Asanović
SiFive
Chief Architect
Luca Benini
ETH Zurich
Full Professor of Digital Circuits and Systems
Tanya Dadasheva
Ainekko
Co-Founder
Andrew Dellow
Qualcomm
Director of Engineering
Marco Fariselli
Luxottica
Embedded AI Engineer
Andrea Gallo
RISC-V International
CEO
Radim Krcmar
Qualcomm
Engineer
Greg Kroah-Hartman
The Linux Foundation
Fellow
Kushtrium Shala
Digital Valley Albania
Co-Founder
Philipp Tomsich
VRULL GmbH
Founder
Edward Wilford
Omdia
Senior Research Director, Automotive